#include "../includes.h"

PLL_	PLL;

void ResetPLL(void);
void EnablePLL(void);
void EnablePLL2(void);
void SetPLL(char, unsigned short);


void Init_PLL()
{
	PLL.TURN = PLL_FIRST;
	PLL.DelayCounter = 0;
}

void Start_PLL(void)
{

	switch(PLL.TURN) {

		// 75/100
		case PLL_FIRST:
                    	if(PLL.DelayCounter == 1) {
							ResetPLL();
            			}
            			else if (PLL.DelayCounter == 2){
                        	//PLL.DelayCounter = 0;

                        	ClearFail();
                        	EnablePLL();
                        	//EnablePLL2();
                        	PLL.TURN = PLL_SECOND;
                        }
                        PLL.DelayCounter++;
						break;
		// 25/100 �
		case PLL_SECOND:
						EnablePLL2();
        				PLL.TURN = PLL_THIRD;
                        PLL.DelayCounter = 0;
						break;

		// 75/100 �
		case PLL_THIRD:
                    	if(PLL.DelayCounter == 0) {
				        	//AjustPLLClockLossSYS();
						}
						else if(PLL.DelayCounter == 10){

							PLL.DelayCounter = 0;
	   	    				PLL.TURN = PLL_FIRST;
    	   					EVENT.PLL = OFF;
    	   				}
    	   				PLL.DelayCounter++;
						break;
	}
}



/* ---------------------------------------------------------------------
Last Updated  : Fri  07-18-97 17:18:01
Function Name : Enable_PLL()
Description   : MC145170 set to 19.6608MHz
Parameters    : No
Return Values : No
--------------------------------------------------------------------- */
#define	PLL_RESET	0
#define PLL_REG_C	1
#define PLL_REG_R	2
#define PLL_REG_N	3

#define	RESET_1		0x0000
#define RESET_2		0x1000

//#define C_REG_1		0x6700

//#define C_REG_1		0x2700
//#define C_REG_1		0x6700

// gcd( 8,192,000,10,000,000) =16,000
// 10,000,000 / 16,000 = 625 = 0x271
//  8,192,000 / 16,000 = 512 = 0x200

// gcd(12,352,000,10,000,000) =16,000
// 10,000,000 / 16,000 = 625 = 0x271
// 12,352,000 / 16,000 = 772 = 0x304

// gcd(39,321,600,10,000,000) =
// 10,000,000 / 3200 = 0xC35
// 12,352,000 / 3200 = 0x3000


#define C_REG1   0x6b00
#define R_REG1   (0x0c35<<1)
#define N_REG1    0x3000


#define C_REG2   0x6700
#define R_REG2   (0x271<<1)
#define N_REG2   0x0304

#define DON_CARE    0



void ResetPLL(void)
{
  SetPLLConfigPin();	

	// 1. Reset
	SetPLL_LE_High();
	SetPLL(4,RESET_1);
	SetPLL_LE_Low();
	SetPLL(5,RESET_2);
	SetPLL_LE_High();
}

void EnablePLL(void)
{

}



void SetPLL(char BitNo, unsigned short Din)
{
	int i;
	//for( i = 0; i < Don1; i++){	CLOCK;	}

	for( i = 0; i < BitNo; i++ ){
		if( (Din << i) & 0x8000 ){	SetPLL_DATA_High();;	}
		else {	SetPLL_DATA_Low();;	}
        SetPLL_CLK_Low();
        SetPLL_CLK_High();
	}

}


void EnablePLL2(void)
{
}


void InitPLL_1st(unsigned long ValueN,unsigned long ValueR,unsigned long ValueF )
{
	unsigned long PLL_Value[3];
	char i,j;

	// 2. C-register
	SetPLL_LE_Low();
	SetPLL(16,DON_CARE);
	SetPLL(8,C_REG1);
	SetPLL(8,DON_CARE);
	SetPLL(8,C_REG1);
    SetPLL_LE_High();


	// 3. R-register
	SetPLL_LE_Low();
	SetPLL(25,DON_CARE);
	SetPLL(15,R_REG1);
	SetPLL(1,DON_CARE);
	SetPLL(15,R_REG1);
    SetPLL_LE_High();

	// 4. N-register
	SetPLL_LE_Low();
	SetPLL(16,DON_CARE);
	SetPLL(16,N_REG1);
	SetPLL(16,N_REG1);
    SetPLL_LE_High();

}


